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为扩展工业操控领域的中心功用并丰盛其接口操作,本文提出一种根据AT91RlM9200微操控器的智能化多总线测控模块的规划方法以及体系的构建架构,并给出闪现接口的软、硬件处理计划。该模块运用嵌入式体系处理了闪现接口结束困难的问题,具有较好的实践运用前景。
导语
1 MultiBus―CPU模块软件规划计划
2 MulitiBus―CPU模块硬件规划计划
3 闪现模块硬件规划计划
MultiBus―CPU模块是根据AT91RM9200微操控器的智能化多总线测控模块。该CPU模块首要结束对下位机的操控,并建立根据Modbus―RTU总线协议的总线通讯体系结构,让体系设备能够无缝接入根据Modbus―RTU方法的总线体系,牢靠、实时、精确地结束工业现场数据收集、信号输出等功用;一同,供给规范视频接口用于闪现16位色图画,供给规范音频输入输出接口用于结束录放音功用。该模块作为嵌入式开发环境的中心,可结束人机界面的交互操作和闪现、海量数据的存储、多串口、多USB口、音频信号输入输出、以太网口等接口;作业Linux操作体系,能够快速建立面向运用的嵌入式运用体系。
为了满足实践运用对实时性的要求,MultiBus―CPU模块软件选用了Linux2.6.21操作体系。其间,Linux2.6的内核任务能够被抢占,这一特性使得Linux2.6内核适用于实时体系和嵌入式体系中。驱动程序在Linux环境下进行开发,运用层选用规范的通讯协议――Modbus协议,操控设备能够连成工业网络进行会集监控。经过一同的Modbus接口,MultiBus―CPU模块与扩展下位机均可作为对等设备在工业网络中进行对话,使得各个设备无缝接入到工业操控网络中。MultiBus―CPU模块支撑现阶段工业测控体系中最常用的以太网(UDP)通讯及RS485通讯协议。因而,本模块在与其他功用模块进行通讯时,选用Modbus―RTU数据通讯方法,运用以太网(UDP)/RS485总线进行数据的发送与接纳,结束对各功用模块的会集监控。软件全体结构如图l所示。
硬件规划原理图如图2所示。MultiBus―CPU模块选用Atmel公司的AT91RM9200为主处理器,融合了ARM920T ARM Thumb处理器。其作业于180 MHz时功用高达200 MIPS;具有存储器处理单元,能够作业Linux等实时操作体系;具有10/100 Base―T型以太网卡接口,只需外扩一个PHY即可结束以太网通讯;具有USB 2.O全速(12 Mb/s)主机双端口,能够扩展键盘、鼠标、U盘等规范外设。
主处理器AT91RM9200具有5个串口:1个DEBUG串口,规划为RS232接口,能够直接联接PC的串口进行调试;1个RS485接口,能够与其他功用模块的RS485接口组成网络;其他3个串口均规划为RS232接口。
经过CPU模块的外部总线和Epson公司的S1D13506闪现芯片扩展了一个VGA接口,分辨率为640×480,256色。IS41LVl6100为其供给独立显存,容量为1M×16位,支撑EDO PAGE方法。
GL850A芯片是一个低功耗的USB 2.0 HUB操控器,AT91RM9200本身的USB HOST接口经过GL850A芯片扩展为4个USB HOST接口。
DS3231是精度非常高的I2C集成实时时钟。其精度在0~40℃内高达±2 ppm,在-40~85℃内精度可达±3.5ppm;板载电池,掉电后能够坚持时刻;可为体系供给秒、分、小时、日、日期、月、年等信息,具有主动闰年调整功用。
WM8731是一个低功耗网络音频编解码器(CO-DEC),具有输出功率放大器和可编程采样速率设定功用。WM8731芯片经过I2S接口与CPU联接,为CPU模块扩展了音频信号的输入输出接口,使体系具有音频采样功用,音频信号数字化后能够经过以太网传送。
DM9161为10/100M快速以太网物理层单芯片收发器,H1102为网络隔绝变压器,用于结束10/100M自适应的牢靠网络传输功用。
MultiBus―CPU模块经过增加闪现操控芯片及其驱动结束了闪现接口,体系作业信息能够直接经过VGA闪现器闪现出来,大大提高了人机交互的可操作性。
3.1 接口芯片挑选
接口芯片选用Epson公司出产的大规模闪现操控器S1D13506。它是以SEDl354操控器为基础发展起来的具有更多功用的LCD闪现操控器,支撑全类型、大规模的LCD及CRT/TV闪现器。S1D13506内置RAMDAC(Random Access Memory Digital-to-Analog Converter,随机数模转换记忆体)硬件X-Y轴转置二维加速器,共有114个寄存器,能够活络地设置各种不同的闪现方法。
3.2 接口硬件规划
S1D13506与处理器的接口选用通用类型总线(包含数据总线、地址总线、操控总线)。接口界说如表1所列。芯片所用像素时钟CLKl、CLK2是由同步信号发生器ICSl523来供给的,外接1M×16位的EDO-DRAM IS41LVl6100。
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